Arrangement for asynchronous decimation using a frequency ratio

Pulse or digital communications – Synchronizers – Synchronizing the sampling time of digital data

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Details

375371, 375372, 341 50, 341 61, 341123, 370503, 370516, H04L 700, H03M 700, H03M 100

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active

06005901&

ABSTRACT:
A communication system includes a data sampling rate converter that uses a closed-loop control arrangement to convert an input signal at a first sampling rate to a second, asynchronous, sampling rate without requiring extensive output buffering. A small number of data registers in a first-in-first-out output buffer is used to receive and store computed data samples at a controlled rate and to pass these data samples to the output at a second rate. The output buffer indicates, the current capacity of the output buffer for use by a frequency ratio estimator, which is arranged to respond by providing an estimate of the actual ratio between the first rate and the second rate. A controller responds to the frequency ratio estimator by generating the controlled rate at which the computed data samples are to be passed to the output buffer. In this manner, the processed data samples are passed to the output buffer at the controlled rate and are output at the second rate. The processed data use the input samples received at a first rate and the ratio value.

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