Arrangement for aligning and attaching a shim to a semiconductor

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Details

357 65, 357 79, H01L 2348, H01L 2940, H01L 2342

Patent

active

044778260

DESCRIPTION:

BRIEF SUMMARY
The invention relates to a semiconductor device assembly.
Shims are used in a variety of semiconductor devices inserted between an electrode contact member and the respective surface of the semiconductor element itself. Such arrangements are associated with but not necessarily restricted to the mounting of high current and physically large semiconductor elements. A contact shim is particularly useful where the surface of one semiconductor region is not a contiguous area but is, for example, interdigitated with a surface of a different semiconductor region. In such instances there arise the problems of accurate alignment of the shim and its secure attachment, preferably to the semiconductor element, with minimum loss of contact surface due to e.g. distortion caused by attachment means.
According to one aspect of the present invention there is provided a semiconductor device assembly comprising a semiconductor element having an end face formed with a surface region and a plurality of alignment marks, an electrode to be electrically connected with the surface region, a contact member connected with the electrode and positioned adjacent to the end face of the semiconductor element, means for urging the contact member towards the semiconductor element, and a shim interposed between the contact member and the semiconductor element, said shim including a plurality of alignment means formed therein in positions corresponding to the alignment marks on the semiconductor element so that the shim may be aligned with the surface region of the semiconductor element, said alignment means comprising an aperture formed in the shim and a land extending at least partly across the aperture, and attachment means applied to the lands in the aperture for attaching the shim to the semiconductor element.
According to another aspect of the invention there is also provided a semiconductor device assembly comprising a semiconductor transistor element having an emitter region which forms at an end face a surface region comprising a set of parallel linear ribs, a plurality of alignment marks formed on said end face, an emitter electrode which is to be electrically connected with the emitter surface region, a contact member connected with the electrode and positioned adjacent to the end face of the semiconductor element, means for urging the contact member towards the semiconductor element, and a shim interposed between the contact member and the semiconductor element, said shim being formed with a raised portion of parallel linear ribs which is the mirror-image of the emitter region, a plurality of alignment means formed in the shim in positions corresponding to the alignment marks on the semiconductor element so that raised portion of the shim may be aligned with the emitter region of the semiconductor element, said alignment means comprising an aperture formed in the shim and a land extending at least partly across the aperture, said land being constituted by one of said raised ribs, and ultrasonic welds, applied to the lands in the aperture, for attaching the shim to the semiconductor element.
In order to illustrate how the invention may be readily carried into practice an embodiment will now be described by way of example only and with reference to the accompanying drawings, in which:
FIG. 1 shows a plan view of a preferred shim member viewed from the raised region side,
FIG. 2 shows a detailed view of one of the alignment holes of the shim of FIG. 1,
FIG. 3 shows a view on section Y--Y in FIG. 2, and
FIGS. 4 and 5 show cross sections through transistor assemblies.
The embodiment to be described is a high current transistor comprising a relatively physically large semiconductor element in the form of a diffused circular silicon slice of approximately thirty millimeters diameter on one face of which emitter and base contacts are formed, separated by a channel of insulating semiconductor oxide and corresponding to the interfitting emitter and base region patterns.
The particular emitter pattern in this embodiment is in the form of a

REFERENCES:
patent: 3418543 (1968-12-01), Marino et al.
patent: 3473303 (1969-10-01), Lutz
patent: 3931635 (1976-01-01), Sundstrom
patent: 4289834 (1981-09-01), Alcorn et al.

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