Arrangement and method for detecting interference in TDMA commun

Multiplex communications – Wide area network – Packet switching

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Details

370 953, 455 673, 4552262, 4552263, H04J 314

Patent

active

052804712

ABSTRACT:
Interference in a high speed receive signal is effectively detected in a TDMA communications system wherein a plurality of time slots is provided within a TDMA frame. A comparator is arranged to receive a first signal indicative of receive signal strength and a reference level signal. The comparator compares the magnitudes of the two signals applied thereto and outputs a comparison result signal. A delay circuit is supplied with a second signal indicative of a time slot which is not in use and which delays the second signal by a predetermined time using a clock which is synchronized with the time slots of the TDMA frame. A gate circuit, preceded by the comparator and the delay circuit, is supplied with the outputs of the comparator and the delay circuit. The gate circuit outputs a third signal which changes a logic level in the event that the strength of the first signal exceeds that of the reference level signal during the time slot which is not in use.

REFERENCES:
patent: 5148548 (1992-09-01), Meche et al.

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