Arrangement and a method for handling interrupt requests in a da

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395275, 395700, 3642282, 364280, 3642302, 3642808, 3642314, 364284, 3642842, 364DIG1, G06F 946, G06F 1208

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052916057

ABSTRACT:
A technique for handling an interrupt request issued from an I/O (Input/Output) device controller in a data processing system which is operative in a virtual machine mode in which two flags are provided, the first one of which is set to an "on" state in the case where a CPU (Central Processing Unit) is utilized as a master unit and is set to "off" state in the case where the CPU is utilized as a slave unit. The second flag is set to an "on" state in the case where the CPU is utilized as the master unit and is able to accept the interrupt request directed to a guest OS (Operating System). A first logic gate is arranged to issue a logical product of the output of the first flag and one of the outputs of the I/O device controller. A second logic gate is provided to issue a logical product of the output of the second flag and another of the outputs of the I/O device controller. Further, a third logic gate is arranged to issue a logical sum of the outputs of the first and second gates. An interrupt activator is responsive to the output of the third logic gate and then checks to see if the interrupt request issued from the I/O device controller is acceptable.

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