Arithmetic unit for exponential function

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364754, 364761, G06F 738, G06F 752

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active

049791397

ABSTRACT:
An arithmetic unit for carrying out sequentially arithmetic pseudo division and reverse-sequentially pseudo multiplication according to algorithm based on Sequential Table Look-up method utilizing constant values 2.sup.k xloge (1+2.sup.-k) so as to calculate value of exponential function e.sup.x -1 for a given value x comprises a generator which generates the constant values 2.sup.k xloge(1+2.sup.-k) from k-0 to k=m-1 where m is a positive integer number, an adder-subtracter controlled to selectively carry out arithmetic addition and subtraction, an output register connected to receive and store the result from the adder-subtracter and a barrel shifter is connected to the output register for right-shifting a content thereof by shift bit count k. The input registers are connected to the adder-subtracter. One of the input registers is connected to the output register to receive its updated content and the other input register is connected to the generator for receiving therefrom the constant value 2.sup.k xloge(1+2.sup.-k) during the pseudo division and to the barrel shifter for receiving therefrom the right-shifted content of the output register during the pseudo multiplication. A stacker is connected to the output register for stacking in First-In, Last-Out basis sign bit of the contents of the output register and is adapted to control the adder-shifter.

REFERENCES:
patent: 4817047 (1989-03-01), Nishitani et al.

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