Boots – shoes – and leggings
Patent
1987-08-13
1989-07-25
LaRoche, Eugene R.
Boots, shoes, and leggings
364758, G06F 7544
Patent
active
048520373
ABSTRACT:
In an arithmetic unit comprising a partial product circuit for calculating a plurality of partial products for two numbers and a Wallace tree responsive to the partial products for producing a plurality of tree outputs which gives a total product of the two numbers when summed up, an addend is supplied to the Wallace tree as an additional partial product. The arithmetic unit produces a resultant sum of the total product plus the addend. The addend may be supplied to the Wallace tree from one or more registers therefor. Alternatively, a result register is used for the total product with the total product supplied to the Wallace tree as the addend. As a further alternative, an additional register is used for a third number which is used with bit shifts as the addend. In this last event, the arithmetic unit preferably produces a sum selected from the resultant sum.
REFERENCES:
patent: 4156922 (1979-05-01), Majerski et al.
patent: 4215419 (1980-07-01), Majerski
patent: 4337519 (1982-06-01), Nishimoto
patent: 4546446 (1985-10-01), Machida
patent: 4594678 (1986-06-01), Uhlenhoff
patent: 4627026 (1986-12-01), Di Giugno
patent: 4727507 (1988-02-01), Miyanaga
patent: 4752905 (1988-06-01), Nakagawa et al.
Wallace, "A Suggestion for a Fast Multiplier", IEEE Trans. on Electronic Computers, Feb. 1964, pp. 14-17.
Ham Seung
LaRoche Eugene R.
NEC Corporation
LandOfFree
Arithmetic unit for carrying out both multiplication and additio does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Arithmetic unit for carrying out both multiplication and additio, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Arithmetic unit for carrying out both multiplication and additio will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2363620