Arithmetic unit, correlation arithmetic unit and dynamic...

Image analysis – Image compression or coding – Interframe coding

Reexamination Certificate

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Details

C382S278000, C382S281000, C708S422000

Reexamination Certificate

active

06292586

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an arithmetic unit suitable for a correlation operation, a correlation arithmetic unit using such an arithmetic unit and a dynamic image compression apparatus using such a correlation arithmetic unit.
2. Description of the Related Art
It is necessary for a control of a mobile robot and an automatic traveling of a motorcar to measure a velocity vector in a camera screen. A control for the movement and the traveling is performed on the basis of the measured vector.
The velocity vector will be described referring to FIG.
1
. Now, in the consideration of a circular figure in the space, as the robot moves, the circular figure moves in the position between the previous screen obtained through a camera and the present screen. This movement and its direction (or a movement vector) is measured. The measured. movement vector divided by a time interval between the previous screen and the present screen gives the velocity vector.
In order to measure the movement vector, a two-dimensional correlation is used. A small area (a rectangle defined by a dotted line) of the previous screen is shifted on a two-dimensional basis by an arbitrary vector (&Dgr;
X
, &Dgr;
Y
) to take a correlation with a small area (a rectangle defined by a solid line) of the present screen. When the shift vector (&Dgr;
X
,&Dgr;
Y
), wherein the correlation becomes the maximum, is detected, it is the movement vector to be determined.
In the field of communications, a “movement compensation” is performed for a compression of a dynamic image. It will be explained referring to FIG.
1
. The circle in the present screen is equivalent to a translation of the circle in the previous screen. Thus, there is no need to transmit image data as to the circle as image data of the present screen. It is sufficient to transmit only a movement vectors that the circle data on the previous screen is shifted to be displayed. Thus, a remarkable image compression is carried out. This scheme is used in International Standardization such as an MPEG. The two-dimensional correlation is used also for a measurement of the movement vector.
Also, in a pattern matching used in a pattern recognition and the like, it is necessary to detect a pattern matched in two screens and determine a vector as to their interval. The two-dimensional correlation is used also for such a matching.
The two-dimensional correlation is calculated, assuming that a luminance of a pixel (x, y) in a small area of the present screen is represented by a (x, y) and a luminance of a pixel shifted by (&Dgr;
X
,&Dgr;
Y
) in a small area of the previous screen is represented by b (x+&Dgr;
X
, y+&Dgr;
Y
), in the form of the product and sum of their whole pixels in accordance with the following equation.
C(&Dgr;
X
,&Dgr;
Y
)=&Sgr;
X
&Sgr;
Y
a(x,y)b(x+&Dgr;
X
,y+&Dgr;
Y
)  (5)
Where the accumulation of x and y is performed throughout small areas.
However, since the “product” of the above equation needs a large scale of hardware as compared with addition and subtraction, the product is replaced by the “absolute value of the difference”, the two-dimensional correlation is calculated in accordance with the following equation.
C(&Dgr;
X
,&Dgr;
Y
)=&Sgr;
X
&Sgr;
Y
|a(x,y)−b(x+&Dgr;
X
,y+&Dgr;
Y
)|  (6)
This replacement involves several drawbacks. The correlation expressed by equation (5) takes the maximum value when both the small areas match with one another (or when a travel equivalent to the movement vector is implemented), and takes the smaller value when both the small areas do not match with one another. Thus, it is possible to detect the maximum value so as to detect the movement vector with great accuracy. On the other hand, the correlation expressed by equation (6) takes the value zero when both the small areas match with one another, and takes the larger value when both the small areas do not match with one another. Consequently, the minimum value is detected to detect the movement vector. However, the correlation expressed by equation (6) takes the smaller value not only when both the small areas match with one another, but also when luminance of the screen is small in its entirety. Thus, there remains the problem in a reliability of the minimum value detection. Further, the noise mixed into the screen causes the correlation to vary, and thus a detection of the minimum value is insecure. According to equation (5), the correlation value becomes zero when luminance of one of the screens is zero. This indicates that it is involved in a non-correlation. On the contrary, according to equation (6), luminance of another of the screens becomes a correlation value. Thus, there remains the problem in a determination of the correlation.
SUMMARY OF THE INVENTION
In view of the foregoing, it is therefore an object of the present invention to provide an arithmetic unit suitable for a correlation operation, a correlation arithmetic unit using such an arithmetic unit and a dynamic image compression apparatus using such a correlation arithmetic unit, in which arithmetic operations are simplified and as a result the arithmetic operations can be carried out with a small scale of hardware.
FIG. 2
is a basic block diagram of the first arithmetic unit according to the present invention.
To attain the above mentioned object of the present invention, there is provided the first arithmetic unit in which two numeral values a and b are inputted, and the two numerical values a and b are subjected to a predetermined operation process, so that a numerical value c representative of an operation result is derived, comprising:
an absolute value operation unit
2
-
1
for evaluating an absolute value |c| of the numerical value c, and
a sign operation unit
2
-
2
for evaluating a sign “sing (c)” of the numerical value c.
In the first arithmetic unit according to the present invention, it is acceptable that said absolute value operation unit
2
-
1
receives input signals representing the two numerical values a and b, and then outputs a signal representing a sum |a|+|b| of absolute values |a| and |b| of the two numerical values a and b, and
said sign operation unit
2
-
2
outputs signals representing a plus and a minus in compliance with either one of a match and a mismatch of signs “sign (a) and sign (b)” of the two numerical values a and b and the other, respectively.
In this case, as shown in
FIG. 3
, it is acceptable that said absolute value operation unit
2
-
1
comprises a digital adder
3
-
1
, said digital adder receiving two input digital signals representing absolute values |a| and |b| of the two numerical values a and b, and performing an arithmetic operation of a sum |a|+|b| of the absolute values |a| and |b|, thereby outputting a digital signal representing the absolute value |c| of the numerical value c, and
said sign operation unit
2
-
2
comprises a logic circuit
3
-
2
, said logic circuit receiving digital signals representing signs “sign (a) and sign (b)” of the two numerical values a and b, and operating a logical exclusive OR on the signs “sign (a) and sign (b)” of the two numerical values a and b, thereby evaluating the sign “sing (c)” of the numerical value c.
Further, as shown in
FIG. 4
, it is acceptable that said absolute value operation unit
2
-
1
comprises an analog adder, said analog adder receiving two input analog signals representing absolute values |a| and |b| of the two numerical values a and b, and performing an arithmetic operation of the sum of the two absolute values, thereby outputting an analog signal representing the absolute value |c| of the numerical value c, and
said sign operation unit
2
-
2
comprises a logic circuit, said logic circuit receiving digital signals representing

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