Arithmetic unit and receiver unit

Details Arithmetic unit and receiver unit Arithmetic unit and receiver unit

2005-09-20

2005-09-20

Ngo, Chuong D (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

C708S520000

Reexamination Certificate

active

06947961

ABSTRACT:
There are provided an arithmetic unit and a receiver unit which execute an arithmetic operation at a high speed and allow reduction of the size thereof. An input section inputs data of the data group. First to n-th (n>1) storage sections have a capacity capable of storing at least part or all of the data group. A readout section selects one of the first to n-th storage sections and reads out therefrom a data group already stored therein. An arithmetic section performs a predetermined arithmetic operation between the data group read out by the readout section and the data group newly inputted by the input section. A writing section writes a result of the predetermined arithmetic operation by the arithmetic section in a predetermined one of the storage sections, which is not selected by the reading section as the one from which the data group already stored therein is to be read out.

REFERENCES:
patent: 4689762 (1987-08-01), Thibodeau, Jr.
patent: 5371877 (1994-12-01), Drako et al.
patent: 6061783 (2000-05-01), Harriman
patent: 6115728 (2000-09-01), Nakai et al.
patent: 6191998 (2001-02-01), Reddy et al.
patent: 5-20139 (1993-03-01), None
patent: 5-66751 (1993-09-01), None

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