Arithmetic unit and method thereof

Details Arithmetic unit and method thereof Arithmetic unit and method thereof

2006-01-17

2006-01-17

Malzahn, D. H. (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

C708S497000, C708S503000, C708S551000

Reexamination Certificate

active

06988120

ABSTRACT:
A squaring multiplier for a floating-point number comprises: a pseudo carry generator for generating pseudo information concerning a carry equivalent to predetermined bits for the calculation of a target variable; an MSB look ahead circuit for employing the variable to perform a look ahead operation and establish the location of the MSB (Most Significant Bit) in the calculation results; and combinational circuits for performing the rounding off process and the calculation of the variables by using information concerning a carry, which is generated by the pseudo carry generator and based on the location of the MSB determined by the MSB look ahead circuit.

REFERENCES:
patent: RE35365 (1996-10-01), Colavin
patent: 6018758 (2000-01-01), Griesbach et al.
patent: 6301598 (2001-10-01), Dierke et al.
patent: 6393453 (2002-05-01), Purcell
patent: 6766346 (2004-07-01), Amer
patent: 2001/0018699 (2001-08-01), Amer

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