Arithmetic unit

Details Arithmetic unit Arithmetic unit

2005-05-31

2005-05-31

Ngo, Choung Dinh (Department: 2124)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

C712S300000, C341S060000

Reexamination Certificate

active

06901419

ABSTRACT:
The present invention provides an arithmetic unit comprising an input register for storing externally input digital data as a P-bit digital data, an output register for storing a Q-bit digital data, and an output bit selecting means. The output bit selecting means is operable to receive the P-bit digital data which is output from the input register as a first input data, and the Q-bit digital data which is output from the output register as a second input data. The output big selecting means is further operable to select bits, values of which bits are to be output, among bits of the first input data and bits of the second input data, in accordance with a control data which is input from outside. The output bit selecting means is still further operable to output Q-bit digital data comprising the values of the selected bits to the output register. This arithmetic unit is suitable for being employed in an image processing system to perform the multiplexing processing or the demultiplexing processing for codes at high speeds.

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Hanna et al. “Bit Manipulator” IBM Technical Disclosure Bulletin, IBM vol. 16, No. 6, Nov. 1974, pp. 1575-1576.

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