Arithmetic unit

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G06F 738

Patent

active

047470666

ABSTRACT:
Arthmetic unit for transferring the information at one bit of an accumulator or one of general registers into another bit. The accumulator comprises a first memory circuit while a flag register is used as a second memory circuit. Selection circuits for selecting the data at each bit of the first and second memory circuits are provided. When a given instruction is such that the data stored in the second memory circuit is transferred into a specified bit of the first memory circuit, only the selection circuit corresponding to the specified bit is selected so that the data stored in the second memory circuit is written, whereby the data stored in the second memory circuit is written or transferred into the specified bit of the first memory circuit.

REFERENCES:
patent: 3924110 (1975-12-01), Cochran et al.
patent: 4078251 (1978-03-01), Hamilton
patent: 4144566 (1979-03-01), Timsit
patent: 4156927 (1979-05-01), McElroy
patent: 4164037 (1979-08-01), Cochran et al.
patent: 4242675 (1980-12-01), Boone et al.
patent: 4524455 (1985-06-01), Holsztynski et al.
Bennett, "Add a Flag Register to the 900 muP", Electrical Design News, vol. 27, No. 8, Apr. 1982, p. 201, Boston, MA.
David et al., "Single Bit Manipulation", IBM Technical Disclosure Bulletin, vol. 20, No. 7, Dec. 1977, pp. 2543-2546, New York.

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