Boots – shoes – and leggings
Patent
1988-06-17
1990-09-11
Harkcom, Gary V.
Boots, shoes, and leggings
64200, G06F 738
Patent
active
049568000
ABSTRACT:
A first processor outputs a series of macro instruction steps which are obtained by dividing an executing sequence of instructions to specify arithmetic operating processes to proper executing units and to time-sequentially output a macro instruction to indicate the execution of each of the macro instruction steps divided; a second processor takes the series of macro instruction steps from the first processor and output instructions included in the macro instruction step of the relevant step in response to the input of the macro instruction. An arithmetic operation processing apparatus of the parallel processing type consists of an arithmetic operation processing unit to execute the arithmetic operation on the basis of the instruction from the second processor; and an object program is generated for combining an arithmetic operation processing sequence to a plurality of macro sequences consisting of one or more instructions along the relevant processing sequence upon compiling, for defining each macro sequence as a macro instruction step, for assigning them to the second processor, for assigning the data transfer process and the macro instruction outputs for the second processor to the first processor, and during the execution of the n-th macro instruction step by the second processor, for enabling in parallel therewith the data, which will be necessary by the first processor in the (n+1)th and subsequent macro instruction steps, or the resultant data processed by the (n-1)th and preceding macro instruction steps to be transferred between a memory system provided for the first processor and the arithmetic operation processing unit.
REFERENCES:
patent: 4149241 (1979-04-01), Patterson
patent: 4367524 (1983-01-01), Budde et al.
patent: 4376976 (1983-03-01), Lahti et al.
patent: 4539655 (1985-09-01), Trussell et al.
Harkcom Gary V.
Hitachi , Ltd.
Nguyen Long T.
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