Arithmetic operation processing apparatus

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364736, 364754, G06F 700, G06F 752

Patent

active

051857146

ABSTRACT:
An arithmetic operation processing apparatus in which one or more multipliers and a plurality of multiplicands are inputted, a multiplication result between one multiplier and one multiplicand and a multiplication result between a complement of the one multiplicand and the other multiplier are added together and outputted. The arithmetic operation processing apparatus includes a plurality of selectors each for selectively outputting the one multiplicand or the other multiplicand in accordance with a plurality of control signals generated from the one multiplier; and an adder for adding together outputs from the selectors.

REFERENCES:
patent: 3814924 (1974-06-01), Tate
patent: 4573136 (1986-02-01), Rossiter
patent: 4594680 (1986-06-01), Schomburg et al.
patent: 4679164 (1987-07-01), Rearick

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