Arithmetic operation apparatus for elementary function

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364735, G06F 738, G06F 1532

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052355357

ABSTRACT:
An arithmetic operation apparatus performs an arithmetic operation of a differentiable elementary function including a sine function sin (x), a cosine function cos (x), arc tangent function arctan (x), an exponential function e.sup.x, a logarithm function log.sub.e (x), an inverted number 1/x, a square root .sqroot.x, and an inverted number of a square root 1/.sqroot.x. The apparatus comprises a divider receiving an initial value (x) for dividing the initial value into a more significant digit portion H and a less significant digit portion L (x=H+L), and 2.sup.H -word memories of "k" banks receiving the more significant digit portion H of the initial value (x) and storing a value obtained by multiplying the more significant digit portion H by a previously calculated constant b.sub.0 =f(H) or b.sub.k =(1/k!).times.f.sup.(k) (H) (where k is positive integer). An arithmetic circuit composed of a multiplier and an adder receives the less significant digit portion L of the initial value (x) and an output of the memories for executing the following polynomial:

REFERENCES:
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patent: 5042001 (1991-08-01), Brightman et al.
Elektronik, vol. 32, No. 9, May 1983, Munchen de, pp. 59-62; W. Taetow; "Digitale Multiplizierer in CMOS-Technik".
Proceedings of the 7th Symposium on Computer Arithmetic, 4-6, Jun. 1985, Urbana, Ill. Jun. 1985, IEEE, New York, pp. 82-85; M. Ohnashi et al.: "High-Speed Computation of Unary Functions".
IBM Technical Disclosure Bulletin, vol. 31, No. 2, Jul. 1988, New York, pp. 331-334; "High Speed Floating Point Multi-Function Generator".

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