Arithmetic logic unit with outputs indicating invalid computatio

Details Arithmetic logic unit with outputs indicating invalid computatio Arithmetic logic unit with outputs indicating invalid computatio

1983-09-30

1986-08-26

Malzahn, David H.

Boots, shoes, and leggings

G06F 1110

Patent

active

046086595

ABSTRACT:
What is disclosed is apparatus making up an arithmetic logic unit and utilizing a programmable read-only memory (PROM) to perform arithmetic functions for an associated processor. The PROM is used as a look-up table for computation results. Operands used to perform a mathematical computation make up an address to the PROM which is used to read out the computation result stored therein. Also stored in the PROM as part of each computation result are information bits indicating if the computation result is a valid answer. These bits are also read out and stored in flip-flops to indicate to the processor if the computation result is valid or invalid.

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