Arithmetic logic unit having preshift and preround circuits

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

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708551, G06F 738

Patent

active

060120762

ABSTRACT:
An arithmetic logic unit (30) for a digital signal processor (DSP) contains circuitry for preshifting (46, 48) and prerounding (54) the 2's-complement fractional input operands (32, 34) before they are used by a carry look-ahead adder (56). The preshifting (46, 48) provides for efficient divide-by-2 and divide-by-4 functionality and reduces early overflow. Concurrent preshifting (46, 48) and prerounding (54) improve the critical path timing in the carry look-ahead adder (56).

REFERENCES:
patent: 4922446 (1990-05-01), Zurawski et al.
patent: 5390134 (1995-02-01), Heikes et al.
patent: 5677861 (1997-10-01), Inoue et al.

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