Arithmetic logic unit arranged for manipulating bits

Details Arithmetic logic unit arranged for manipulating bits Arithmetic logic unit arranged for manipulating bits

1980-06-02

1985-06-25

Shaw, Gareth D.

Boots, shoes, and leggings

G06F 700, G06F 1520

Patent

active

045257760

ABSTRACT:
A digital computer is arranged to process data through an arithmetic logic unit in response to instructions residing sequentially in an instruction register, each instruction requiring a single instruction interval for fetching data from a selected source in a store, processing the data in the arithmetic logic unit, and storing the result of processing the data into a selected destination in the store. Means are provided for moving a single bit from any selected one of a plurality of bit positions in the selected source to any selected bit position of a plurality of bit positions in the selected destination during a single instruction interval without affecting the state of any other bit of the selected destination.

REFERENCES:
patent: 3982229 (1976-09-01), Rouse et al.
patent: 4194241 (1980-03-01), Mager
Standard Dictionary of Computers and Information Processing; Martin H. Weik, Hayden Book Company Inc.

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