Arithmetic logic system capable of checking carry look-ahead cir

Details Arithmetic logic system capable of checking carry look-ahead cir Arithmetic logic system capable of checking carry look-ahead cir

1988-04-28

1989-10-24

Harkcom, Gary V.

Boots, shoes, and leggings

G06F 750

Patent

active

048766615

ABSTRACT:
An arithmetic logic system includes a plurality of arithmetic logic units for processing data composed of a corresponding number of bits and having a path for transferring a carry through the respective arithmetic logic units, and a carry look-ahead circuit provided in parallel to the carry transfer path and having inputs respectively connected to the arithmetic logic units for generating a carry look-ahead signal when a carrry look-ahead condition is realized. A carry signal output is connected to a most upstream end of the carry transfer path, and a first transfer gate is connected at its one end to the carry signal output and at its other end to a predetermined voltage. The first transfer gate operates in response to the carry look-ahead signal so as to connect the carry signal output to the predetermined voltage. A second transfer gate is connected between the carry signal output and the most upstream end of the carry transfer path. This second tranfer gate operates in response to a test mode signal to isolate the carry signal output from the carry transfer path so that the carry is transferred through only the carry look-ahead circuit. Therefore, if any failure occurs in the carry look-ahead circuit, an error will be generated in the result of operation on the arithmetic logic system.

REFERENCES:
patent: 4763295 (1988-08-01), Yamada et al.

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