Arithmetic encoding/decoding of a digital information signal

Coded data generation or conversion – Digital code to digital code converters – To or from code based on probability

Reexamination Certificate

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C348S394100, C382S247000

Reexamination Certificate

active

06275176

ABSTRACT:

FIELD OF THE INVENTION
The invention relates to the field of arithmetic encoder apparatus for arithmetically encoding a digital information signals.
An arithmetic encoder is disclosed in the publication ‘Improved lossless coding of 1-bit audio signals’, by F. Bruekers et al, preprint 4563(I-6), presented at the 103rd Convention of the AES, Sep. 26-29, 1997.
The above citations are hereby incorporated in whole by reference.
SUMMARY OF THE INVENTION
The invention aims at providing measures to improve the lossless coding using the arithmetic coder disclosed in the prior art.
In accordance with the invention, the arithmetic coder includes:
input apparatus for receiving the digital information signal,
an arithmetic coder having a first input for receiving an input signal, a second input for receiving a probability signal, and an output for supplying an output signal, the arithmetic coder being adapted to carry out a data compression step on the input signal in response to the probability signal so as to obtain a data compressed version of the input signal, and to supply the data compressed version of the input signal to the output,
a probability signal generator for generating the probability signal for the arithmetic coder, characterized in that the apparatus further includes
a switch for switching the arithmetic coder into an encoding mode for coding one or more symbols of the input signal into corresponding symbols of an output signal, which are substantially identical to the symbols of the input signal.
The invention is based on the recognition that the prediction filter and the probability table are designed for an optimal average performance, but that their local performance can be far from optimal. This can result in a low compression efficiency. In accordance with the invention, the arithmetic coder is switched into a compression mode, such that it encodes the signal received into an encoded output signal which is substantially identical to the signal received. This can eg. be realized by switching the arithmetic coder into an encoding mode for encoding the signal received as if a predetermined and fixed probability signal were applied to the arithmetic coder.
Those skilled in the art will understand the invention and additional objects and advantages of the invention by studying the description of preferred embodiments below with reference to the following drawings which illustrate the features of the appended claims:


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patent: 5592163 (1997-01-01), Kimura et al.
patent: 6055338 (2000-04-01), Endo et al.

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