Arithmetic decoding method and an arithmetic decoding apparatus

Coded data generation or conversion – Digital code to digital code converters – To or from code based on probability

Reexamination Certificate

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Details

C382S247000, C382S238000, C341S067000

Reexamination Certificate

active

06864813

ABSTRACT:
An arithmetic decoding apparatus is provided that carries out complete pipeline processing. Fluctuations in the pipeline caused by occurrence of the normalization are resolved by using a future-predicted Qe memory. In coding multi-valued images, common contexts are generated without distinguishing between AC and DC components of DCT coefficients.

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patent: 5473377 (1995-12-01), Kim
patent: 5589829 (1996-12-01), Astle
patent: 5654702 (1997-08-01), Ran
patent: 5808572 (1998-09-01), Yang et al.
patent: 5867600 (1999-02-01), Hongu
patent: 7-249995 (1995-09-01), None
patent: 11289461 (1999-10-01), None
patent: 2000-115549 (2000-04-01), None
patent: 2000-278538 (2000-10-01), None
patent: 2000-350043 (2000-12-01), None
patent: 2001-189661 (2001-07-01), None
English Language Abstract of JP 7-249995.
English Language Abstract of JP 11-289461.
English Language Abstract of JP 2000-115549.
English Language Abstract of JP 2000-278538.
English Language Abstract of JP 2000-350043.
English Language Abstract of JP 2001-189661.

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