Arithmetic circuits for use with the residue number system

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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Reexamination Certificate

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06898613

ABSTRACT:
A modulo miadder and a modulo mi,jscaling unit for use with an RNS. The adder includes a modulo mibarrel shifter, and a dynamic storage unit coupled to the barrel shifter to store the output of the barrel shifter. In a preferred embodiment, the dynamic storage unit includes one dynamic latch for each output line of the barrel shifter, with each of the dynamic latches including a clocked inverter in cascade with an inverter. One modulo mi,jscaling unit includes a modified modulo mibarrel shifter that performs both residue conversion and an arithmetic operation. The residue conversion is performed without using combinational logic. In one preferred embodiment, the modified barrel shifter performs the residue conversion though mi-mjadditional columns that replicate normal columns for all modulo miinput lines that are congruent modulo mj. Another modulo mi,jscaling unit includes a barrel shifter-based arithmetic circuit, and a dynamic storage unit coupled to the arithmetic circuit to store the output of the arithmetic circuit.

REFERENCES:
patent: 5208480 (1993-05-01), Ishibashi
patent: 5892632 (1999-04-01), Behrens et al.
patent: 6163172 (2000-12-01), Bazuin et al.
Chren, W.A. Jr., “One-Hot Residue Coding for Low Delay-Power Product CMOS Design”, IEEE Transactions on Circuit and Systems II: Analog and Digital Processing, v. 45, No. 3, Mar. 1998, pp. 303-313.
Chren W.A. Jr., “A New Residue Number System Division Algorithm”, Computers and Mathematics with Applications, vol. 19, No. 7, 1990, pp. 13-29.
N.S. Szabo, R.I. Tanka, Residue Arithmetic and Its Applications to Computer Technology, NY: McGraw-Hill, 1967, pp. 147-151.

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