Arithmetic circuit having a simple structure for producing an er

Details Arithmetic circuit having a simple structure for producing an er Arithmetic circuit having a simple structure for producing an er

1994-01-26

1996-02-27

Mai, Tan V.

Excavating

3647461, 364761, G06F 1110, G06F 1500, G06F 700, H03M 1300

Patent

active

054954886

ABSTRACT:
In an arithmetic circuit for producing an error numeric value polynomial and an error locator polynomial in accordance with Euclid's algorithm, a first producing section (11) produces a quotient polynomial and a remainder polynomial which are obtained on dividing a first polynomial by a second polynomial. A first output section (51) outputs the remainder polynomial as the error numeric value polynomial. A second producing section (54) is supplied with the quotient polynomial and a third polynomial and produces a multiplication polynomial by multiplying the quotient polynomial and the third polynomial. A subtracting section (59-1 to 59(N-1)) is supplied with the multiplication polynomial and a fourth polynomial and subtracts the fourth polynomial from the multiplication polynomial to produce a subtraction polynomial. A second output section (60) outputs the subtraction polynomial as the error locator polynomial.

REFERENCES:
patent: 4574361 (1986-05-01), Inagawa et al.
patent: 4694455 (1987-09-01), Koga
patent: 5185711 (1993-02-01), Hattori
Sugiyama et al., "A method for solving key equation for decoding Goppa codes," INSPEC Abstract Nos. P75009328, C75006843, Jan. 1975.

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