Arithmetic circuit capable of executing floating point operation

Details Arithmetic circuit capable of executing floating point operation Arithmetic circuit capable of executing floating point operation

1987-02-18

1989-01-03

Harkcom, Gary V.

Boots, shoes, and leggings

G06F 738

Patent

active

047962186

ABSTRACT:
An arithmetic circuit comprises a pair of input registers for holding a pair of given numbers, and a radix point adjustment circuit coupled to the input registers for aligning the radix points of the given numbers. This adjsutment circuit is capable of outputting at least a pair of radix point aligned fractions and one exponent derived from the radix point alignment. An arithmetic operation circuit receives the pair of the radix point aligned fractions, and outputs the result of a given arithmetic operation of the received fractions and generates an overflow signal when an overflow is generated in the arithmetic operation of the received fractions. An exponent correction circuit receives the exponent from the adjustment circuit, and is responsive to the overflow signal from the arithmetic operation circuit so as to selectively correct the received exponent. A fraction correction circuit receives the output of the arithmetic operation circuit so as to correct the received data. There is provided a first selector receiving the output of the exponent correction circuit and responsive to a given control signal so as to selectively output the output of the exponent correction circuit or a predetermined value. Further, a second selector is provided to receive the outputs of the arithmetic operation circuit and the fraction correction circuit so as to selectively output one of the two received fractions in response to the control signal.

REFERENCES:
patent: 4511990 (1985-04-01), Hagiwara et al.
patent: 4562553 (1985-12-01), Mattedi et al.
patent: 4719589 (1988-01-01), Tanaka
Smith et al., "Fixed, Floating-Point Adder", Technical Notes No.: 846, Aug. 20, 1969, pp. 1-3.

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