Arithmetic apparatus for carrying out viterbi decoding at a high

Details Arithmetic apparatus for carrying out viterbi decoding at a high Arithmetic apparatus for carrying out viterbi decoding at a high

1993-09-27

1998-02-03

Swann, Tod R.

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364768, 364769, 364763, 364764, 36471508, 36471504, 365230, 395405, 395436, 395474, 395495, G06F 700, G06F 1500

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active

057154708

ABSTRACT:
An arithmetic apparatus in which while data read out of a memory is shifted by means of a barrel shifter by a shift bit number designated by data standing for an output signal of an inverter, data standing for an output signal of the barrel shifter is inputted to a shift register to thereby perform Viterbi decoding at a high speed.

REFERENCES:
patent: 4488252 (1984-12-01), Vassar
patent: 4622877 (1986-11-01), Strong
patent: 4639887 (1987-01-01), Farmwald
patent: 4872128 (1989-10-01), Shimizu
patent: 4939684 (1990-07-01), Gehrig et al.
patent: 4979175 (1990-12-01), Porter

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