Arithmetic and logic unit

Details Arithmetic and logic unit Arithmetic and logic unit

1993-11-05

1995-08-15

Bowler, Alyssa H.

Boots, shoes, and leggings

364716, 326 52, 326 53, G06F 738

Patent

active

054428017

ABSTRACT:
An arithmetic and logic unit is provided with a first NAND gate (29) which outputs a NAND logic operation result between a first operand (A.sub.i), a second operand (B.sub.i) and a first control signal (S.sub.0), a first EXOR gate (30) which outputs an EXOR logic operation result between the output of the first NAND gate (29) and a second control signal (S.sub.1), an OR gate (31) which outputs an OR logic operation result between the first operand (A.sub.i) and the second operand (B.sub.i), a second NAND gate (32) which outputs a NAND logic operation result between the output of the first EXOR gate (30) and the output of the OR gate (31), a third NAND gate (20) which outputs a NAND logic operation result between a third control signal (S.sub.2) and a carry input (CY.sub.i-1), and a second EXOR gate (21) which outputs an EXOR logic operation result between the output of the second NAND gate (32) and the output of the third NAND gate (20), so that OR, EXOR and AND logic operations and ADD arithmetic operation for the both operands (A.sub.i and B.sub.i) are executed.

REFERENCES:
patent: 4349888 (1982-09-01), Smith
patent: 4435782 (1984-03-01), Kaufman et al.
patent: 4719590 (1988-01-01), Aman
patent: 5250859 (1993-10-01), Kaplinsky

Affiliated with

Also associated with

Rating

Arithmetic and logic unit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Arithmetic and logic unit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Arithmetic and logic unit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2190840