Arithmetic and logic unit

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Details

364431051, G05B 19042

Patent

active

056894147

DESCRIPTION:

BRIEF SUMMARY
BACKGROUND OF THE INVENTION

The invention relates to an arithmetic and logic unit, in particular belonging to a controller for internal combustion engine fuel injection systems and/or internal combustion engine ignition systems, having a processor and a control logic device, wherein a control device acting as an interface and carrying out specific processor tasks in order to relieve the load on the processor is connected between the processor and the control logic device.
Arithmetic and logic units of the type mentioned initially are known. They are used, for example, for carrying out control tasks. In the case of extensive control tasks, constrained addressing conditions and overloading of the processor can occur, which lead to it not being possible to carry out the data processing in an available time interval. Changes which occur during the calculation of data and would lead to data changes are possibly no longer considered at the correct time if the processor is overloaded.
A device of the type mentioned initially is disclosed in German Patent 27 32 781. This device has a microprocessor which is relieved of the load of determining specific signals, so that it can carry out its other tasks better.


SUMMARY OF THE INVENTION

The arithmetic and logic unit according to the invention has the advantage that a controller is connected between the processor and the control logic device, which controller acts as an interface and carries out specific processor tasks in order to relieve the load on the processor. To this end, it is provided that information is transmitted between the processor and the control logic device in relation to which the controller generates additional information to which the control logic device reacts. In the course of this application, "information" is to be understood to be electronic data information comprising addresses and/or data (datum). According to the above explanations, the processor thus carries out only part of the work; the other part of the work is carried out by the controller. If data which are not changed by the controller are transmitted from the processor to the control logic device, then this area acts in a conventional manner, that is it appears as if the processor is connected directly to the control logic device. In addition, however, the circumstance can arise in which the controller produces additional signals/information which are transmitted to the control logic device via an internal bus, in particular an internal control bus (ISB). In consequence, the processor is relieved of the load since it does not carry out the entire task. As has already been mentioned above, it is additionally or alternatively also possible for information to be transmitted between the processor and the control logic device, which information passes through the controller, being changed. In particular, data which are changed while passing through the controller are transmitted from the processor to the control logic device, the changed data passing from the controller to the control logic device via an internal bus, in particular an internal data bus (IDB). Alternatively or additionally it is possible for information to be transmitted between the processor and the control logic device to pass through the controller which tests the information for specific criteria and, if the criteria are not satisfied, refuses to pass the information on to the control logic device. The controller thus carries out monitoring tasks which do not need to be carried out by the processor, and this leads to relief of the processor load. It is provided in particular that data which are to be transmitted from the processor to the control logic device pass through the controller which tests them for consistency and refuses to pass the data on to the control logic device as a function of the test result. If the data are consistent, that say the criteria applicable to the relevant case are satisfied, then the data from the processor are transmitted to the control logic device.
If specific conditions are not

REFERENCES:
patent: 4348728 (1982-09-01), Sagisaka et al.
patent: 4602324 (1986-07-01), Fujawa et al.
patent: 5233530 (1993-08-01), Shimada et al.
patent: 5233964 (1993-08-01), Jamoua et al.
patent: 5247444 (1993-09-01), Arai et al.
patent: 5267542 (1993-12-01), Keskula

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