Arithmetic and logic processor and operating method therefor

Details Arithmetic and logic processor and operating method therefor Arithmetic and logic processor and operating method therefor

1990-05-30

1994-01-04

Fleming, Michael R.

Boots, shoes, and leggings

395775, 364DIG1, 3642443, 364245, 364247, 3642472, 3642476, 364258, 3642592, 364260, 3642601, 3642606, 3642599, 3642684, G06F 1300, G06F 900

Patent

active

052768201

ABSTRACT:
An arithmetic and logic processor includes a register file structure wherein each procedure to be processed has assigned thereto a predetermined number of registers referred to as register window. The processor further includes circuitry for comparing a predetermined constant LENGTH with the difference between the register window currently utilized by a procedure under execution and the base address of the register file, and circuitry responsive to the comparing circuitry output to detect when data should be transferred on a window basis to or from the register file from or to a stack memory for saving the register file contents, and circuitry responsive to the decision circuitry output to perform data transfer between the register file and the stack memory. According to such circuitry, overflow and underflow of the register file can be greatly suppressed to improve processing speed of the processor.

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