Area filling hardware for a color graphics frame buffer

Details Area filling hardware for a color graphics frame buffer Area filling hardware for a color graphics frame buffer

1984-11-26

1988-05-17

Zache, Raulfe B.

Boots, shoes, and leggings

340744, G09G 100

Patent

active

047455756

ABSTRACT:
A graphics display apparatus includes a raster-scanned CRT refreshed from a bit-for-pel refresh buffer loaded with bit patterns by a microprocessor corresponding to a desired image. To display shaded areas, additional control logic draws an outline of the area in an auxiliary memory, preferably using Bresenham's Algorithm, according to specified rules. Edge filling logic consisting of EXCLUSIVE-OR gates is used to draw the filled area in the refresh buffer as the outline is read from the auxiliary memory into the refresh buffer. This hardware assistance by the control logic and edge fill logic to the microprocessor enables complex areas to be drawn and filled without unduly degrading the performance of the microprocessor.

REFERENCES:
patent: 4189743 (1980-02-01), Schure et al.
patent: 4396989 (1983-08-01), Fleming et al.
patent: 4481594 (1984-11-01), Staggs et al.
patent: 4528642 (1985-07-01), Waller
patent: 4591850 (1986-05-01), Lundstrom
patent: 4626838 (1986-12-01), Tsujioka et al.
IEEE Transactions on Computers; vol. C-30, No. 1, Jan. 1981, pp. 41-48, IEEE, New York, U.S.; B. D. Ackland et al.: "The Edge Flag Algorithm-A Fill Method for Raster Scan Display", *pp. 42-44, paragraph III, Edge Fill.
Applicants' Description of FIG. 1, p. 3 of present application, lines 1-3; also FIG. 1.

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