Area efficient programmable read only memory (PROM) array

Static information storage and retrieval – Read only systems – Fusible

Reexamination Certificate

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C365S094000, C365S227000

Reexamination Certificate

active

07924596

ABSTRACT:
A programmable ROM (PROM) architecture includes cascode NMOS transistors with a fuse bit cell that is arrayed, with sleep transistors located in each column of the array that in a standby mode shut down the entire fuse array. A fuse redundancy scheme may be used to repair a defective fuse row.

REFERENCES:
patent: 5706231 (1998-01-01), Kokubo
patent: 6704236 (2004-03-01), Buer et al.
patent: 2007/0030719 (2007-02-01), Hoefler et al.
patent: 2007/0195574 (2007-08-01), Mabuchi
patent: 2008/0198642 (2008-08-01), Ito

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