Area efficient on-chip timeout generator with low...

Details Area efficient on-chip timeout generator with low... Area efficient on-chip timeout generator with low...

2005-05-31

2005-05-31

Nguyen, Long (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By amplitude

C327S143000

Reexamination Certificate

active

06900669

ABSTRACT:
An area-efficient fully integrated BiCMOS analog time delay circuit with low-power supply requirements provides delays as long as two milliseconds. An ultralow PTAT current source comprises medium-value resistors to discharge an on-chip capacitor from a fixed zero-temperature coefficient voltage. The comparator monitors the capacitor voltage and changes stage from low to high when the capacitor is discharged below a reference voltage having a defined negative temperature coefficient. The temperature coefficient of the reference voltage generator and the PTAT current source are such that the timeout period is independent of temperature in the first-order. The generated timeout delay is independent of the supply voltage and can be used with a supply voltage as low as two volts.

REFERENCES:
patent: 5942921 (1999-08-01), Talaga, Jr.
patent: 6686783 (2004-02-01), Huang

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