1987-09-14
1989-02-21
James, Andrew J.
357 13, 357 42, H01L 2978
Patent
active
048069990
ABSTRACT:
An integrated circuit has an input pad protected from electrostatic discharge by two diodes located under the periphery of the pad. One of the diodes is typically formed in a n-tub, and the other in a p-tub. The boundary between the tubs is located in a region not overlaid by the exposed portion of the pad in one embodiment. An input resistor is optionally included between the pad and the input circuitry for additional ESD protection.
REFERENCES:
patent: 3673427 (1972-06-01), McCoy et al.
patent: 3676742 (1972-07-01), Russell et al.
patent: 4509067 (1985-04-01), Minami et al.
patent: 4605980 (1986-08-01), Hartranft et al.
The Effects of Electrostatic Discharge on Microelectronic Devices-A Review, William D. Greason and G. S. Peter Castle.
Phillips Electronic Components and Materials Division, Phillips Application Book, MOS Integrated Circuits and Their Applications, 1970 (Eindhoven, NL), pp. 107-110, see FIG. 101; p. 107, chapter: "Avalance Bulk Breakdown Device".
Patent Abstracts of Japan, vol. 8, No. 49 (E-230) (1486), Mar. 6, 1984 & JP, A, 58202573 (FUJITSU), Nov. 25, 1983, see abstract; FIG. 3.
American Telephone and Telegraph Company AT&T Bell Laboratories
Crane Sara W.
Fox James H.
James Andrew J.
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