Area efficient asymmetric cellular CMOS array

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays

Reexamination Certificate

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Details

C257S204000, C257S206000

Reexamination Certificate

active

07002192

ABSTRACT:
A cellular MOS array becomes denser by employing an asymmetric structure, in which the areas of the sources are reduced without changing the length and the width of the channel thereof, and thereby the chip size is reduced and the cost is lowered.

REFERENCES:
patent: 4532698 (1985-08-01), Fang et al.
patent: 4992387 (1991-02-01), Tamura
patent: 5170232 (1992-12-01), Narita
patent: 2004/0124478 (2004-07-01), Nishibe et al.

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