Electrical computers and digital processing systems: multicomput – Network-to-computer interfacing
Reexamination Certificate
1999-09-17
2003-11-04
Maung, Zarni (Department: 2154)
Electrical computers and digital processing systems: multicomput
Network-to-computer interfacing
C709S230000, C709S225000
Reexamination Certificate
active
06643710
ABSTRACT:
TECHNICAL FIELD
The present invention generally relates to the field of computer networking. More particularly, the present invention relates to the field of Transmission Control Protocol (TCP) segmentation for a network interface card.
BACKGROUND ART
Computers have become an integral tool used in a wide variety of different applications, such as in finance and commercial transactions, computer-aided design and manufacturing, health care, telecommunication, education, etc. Computers are finding new applications as a result of advances in hardware technology and rapid development in software technology. Furthermore, a computer system's functionality is dramatically enhanced by coupling stand-alone computers together to form a computer network. In a computer network, users may readily exchange files, share information stored on a common database, pool resources, and communicate via electronic mail (e-mail) and via video teleconferencing.
One popular type of computer network is known as a local area network (LAN). LANs connect multiple computers together such that the users of the computers can access the same information and share data. Typically, in order to be connected to a LAN, a general purpose computer requires an expansion board generally known as a network interface card (NIC). Essentially, the NIC works with the operating system and central processing unit (CPU) of the host computer to control the flow of information over the LAN. Some NICs may also be used to connect a computer to the Internet.
Typically, NICs are also used to communicate over a LAN communications network standard referred to as Ethernet. When large amounts of data or data files are transmitted using Ethernet, a Transmission Control Protocol (TCP) segmentation process is typically run on a central processor unit (CPU) of a host computer in order to break the data down into transmission frames. For example, Ethernet has a maximum transmission frame size of 1514 bytes. Of the 1514 bytes of the transmission frame, there are a lot of bytes which are used for overhead. For instance, some bytes are used for addressing, other bytes are used for header information, etc. As such, the bytes remaining for the actual payload of data within each transmission frame are considerably less (e.g., 1460 bytes) than the 1514 bytes. It should be appreciated that there are disadvantages associated with this prior art process of segmenting data for transmission over a network.
One of the main disadvantages of this prior art segmentation process occurs as Ethernet network speed becomes ever faster (e.g., gigabit levels). At these high network speeds, the TCP segmentation process performed by the processor of the host computer becomes a bottleneck of the critical performance path, thereby slowing down the data throughput of the NIC. In other words, the processor becomes a bottleneck for data throughput of the NIC when used at high network speeds.
One of the prior art solutions for improving the throughput of the NIC is to implement an embedded processor onto the NIC in order to specifically perform the TCP segmentation process. In this manner, a large majority of the segmentation process is removed from the processor of the host computer and moved onto the embedded processor of the NIC. This prior art solution does improve the throughput of the NIC, but there are disadvantages associated with this prior art solution.
One of the main disadvantages of this prior art solution is that it does not effectively solve the problem of data throughput of a NIC when used with high speed networks (e.g., gigabit levels). Basically, the embedded processor of the NIC now becomes the bottleneck of the critical performance path thereby slowing down the data throughput of the NIC. In other words, the bottleneck for data throughput of the NIC is moved from the host processor to the embedded processor of the NIC.
Accordingly, a need exists for a method and system for providing significantly improved data throughput of a network interface card which is used with a high speed network (e.g., gigabit levels).
DISCLOSURE OF THE INVENTION
Embodiments of the present invention provide a method and system for providing significantly improved data throughput of a network connection which is used with a high speed network (e.g., gigabit levels). Specifically, one embodiment of the present invention includes a method for implementing transmission control protocol (TCP) segmentation within hardware. The method includes the hardware implemented action of receiving a descriptor from a host device for a data payload stored within host memory to be transmitted over a network. The method also includes the hardware implemented action of utilizing the descriptor to download payload header data of the data payload from the host memory. Furthermore, the method also includes the hardware implemented action of downloading a plurality of data segments of the data payload. Additionally, the method includes the hardware implemented action of repeatedly modifying the payload header data in order to generate a plurality of frame headers which correspond to the plurality of data segments.
In another embodiment, the present invention includes a circuit for implementing transmission control protocol segmentation on a data payload to be transmitted over a network. The circuit includes a first circuit portion coupled to receive a descriptor from a host device for the data payload stored within a host memory to be transmitted over the network. As part of the transmission control protocol segmentation the first circuit portion uses the descriptor to request download of payload header data and data segments of the data payload from the host memory. Additionally, the circuit includes a second circuit portion coupled to receive the payload header data and data segments of the data payload from the host memory. The second circuit portion repeatedly modifies the payload header data to generate frame headers which correspond to said data segments.
In still another embodiment, the present invention includes a system for implementing transmission control protocol segmentation. The system includes a host device which includes a host memory. Additionally, the system includes a circuit for implementing transmission control protocol segmentation. The circuit includes a first circuit portion coupled to receive a plurality of data segments of a data payload stored within the host memory. Moreover, the circuit includes a second circuit portion coupled to receive payload header data of the data payload. It should be appreciated that the second circuit portion repeatedly modifies the payload header data in order to generate a plurality of frame headers which correspond to the plurality of data segments.
These and other advantages of the present invention will no doubt become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiments which are illustrated in the drawing figures.
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Lowe Glen H.
Takashi Gary
Thorne Leslie
3Com Corporation
Chang Jung-won
Maung Zarni
Wagner , Murabito & Hao LLP
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