Architecture for inverse quantization and multichannel processin

Details Architecture for inverse quantization and multichannel processin Architecture for inverse quantization and multichannel processin

1999-07-16

2000-12-26

Tokar, Michael

Coded data generation or conversion

Digital code to digital code converters

341200, 704500, H03M 700, G10L 2100

Patent

active

061666637

ABSTRACT:
A hardware structure for inverse quantization and multichannel processing in MPEG-2 audio decoding is provided, which includes 5 groups of first-in-first-out (abbreviated as FIFO) registers, each group of which has 3 FIFO registers and are connected in series; a multiplier capable for receiving an internal data processing feedback from the last FIFO group of FIFO registers; a single register; a first adder/subtractor capable for receiving a feedback from the first group of FIFO registers and its output being fed to the first group of FIFO registers; a second adder/subtractor capable for receiving a feedback from a second group of FIFO registers. The second group of FIFO registers stores an output from the second adder/subtractor or an output from the first group of FIFO registers; a third group of FIFO registers stores an output from the single register or an output from the second group of FIFO registers; a fourth group of FIFO registers stores an output from the third group of FIFO registers; and so on. The single register output the calculated value of the multiplier as an output of the structure or to at least one of the first second adder/subtractor, second adder/subtractor and the third group of FIFO registers.

REFERENCES:
patent: 5185800 (1993-02-01), Mahieux
patent: 5625743 (1997-04-01), Fiocca
patent: 5649053 (1997-07-01), Kim

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