Architecture for block processing computer system

Details Architecture for block processing computer system Architecture for block processing computer system

1986-11-03

1989-06-13

Shaw, Gareth D.

Boots, shoes, and leggings

364900, G06F 300, G06F 1312, G06F 15347, G06F 922

Patent

active

048398012

ABSTRACT:
A block processing computing system includes a decomposition unit, a control circuit, a system memory, a data block path and a block processor. The decomposition unit receives externally-supplied primitive command packets and decomposes the primitive into machine language operations on computational blocks of data. The control circuitry generates control and address signals for performing the machine level operations. The data block path includes alignment circuitry for selecting data from burst-accessed blocks of data and a macropipeline for controllably storing and transferring blocks of data to and from the block processor. The block processor has interchangeable, double-buffered local zone memories and a parallel set of pipelined vector processors for performing block operations on computational blocks of data.

REFERENCES:
patent: 4080649 (1978-03-01), Calle et al.
patent: 4161784 (1979-07-01), Cushing et al.
patent: 4450525 (1984-05-01), Demuth et al.
patent: 4660143 (1987-04-01), King et al.
patent: 4661900 (1987-04-01), Chen et al.
patent: 4706191 (1987-11-01), Hamstra et al.

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