Multiplex communications – Wide area network – Packet switching
Patent
1997-06-05
1999-03-16
Shah, Alpesh M.
Multiplex communications
Wide area network
Packet switching
395309, 370402, G06F 1300
Patent
active
058840273
ABSTRACT:
A multi-functional device that integrates a high performance processor into a PCI to PCI bus bridge. The invention consolidates a high performance processor, a PCI to PCI bus bridge, PCI bus-processor address translation unit, direct memory acces's (DMA) controller, memory controller, secondary PCI bus arbitration unit, inter-integrated circuit (I.sup.2 C) bus interface unit, advanced programmable interrupt (APIC) bus interface unit, and a messaging unit into a single system which utilizes a local memory. The PCI bus is an industry standard high performance, low latency system bus. The PCI to PCI bridge provides a connection path between two independent 32-bit PCI buses and provides the ability to overcome PCI electrical loading limits. The addition of the local processor brings intelligence to the PCI bus bridge.
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Eskandari Nick
Garbus Elliot
Goldschmidt Marc
Sankhagowit Peter
Intel Corporation
Shah Alpesh M.
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