Television – Image signal processing circuitry specific to television – With details of static storage device
Patent
1995-01-26
1996-12-03
Kostak, Victor R.
Television
Image signal processing circuitry specific to television
With details of static storage device
348719, 345200, 36523003, H04N 964
Patent
active
055813100
ABSTRACT:
An architecture for a memory with a wide word, e.g. n-byte, width particularly suited for use as a high definition video frame store memory (80), and an accompanying organization for storing pixel data therein to facilitate efficient block and raster access therefrom. Specifically, the memory relies on storing n-byte wide words (n=(m.sub.1 .times.m.sub.2)) across m.sub.2 independent m.sub.1 -byte wide memory segments, with pre-defined positional offsets between respective m.sub.1 -byte words (203)("nibbles") stored in successive memory segments. All these segments are simultaneously accessed on a read or write basis. During a memory write operation, all the nibbles in an n-byte wide input word are appropriately shuffled to yield the proper inter-segment offsets prior to being written into the memory as a collective n-byte memory write word. During a read operation, all the nibbles read from memory in a collective n-byte memory read word are appropriately shuffled to yield an n-byte output word. Inasmuch as either a scan line or sub-block (210.sub.W, 210.sub.X, 210.sub.Y, 210.sub.Z) of a macroblock of pixel data is collectively written to or read from the memory during one memory write or read operation, with shuffling occurring on a pipelined basis therewith, each of these two widely differing forms of memory access can each occur at a very high efficiency and hence at essentially full memory bandwidth. This permits that memory to be fabricated from relatively inexpensive memory circuits.
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Augenbraun Joseph E.
Pearlstein Lawrence A.
Plotnick Michael A.
Vinekar Sanjay R.
Hitachi America Ltd.
Kostak Victor R.
Michaelson Peter L.
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