Architecture and process for integrating DMD with control circui

Details Architecture and process for integrating DMD with control circui Architecture and process for integrating DMD with control circui

1990-06-29

1991-05-28

Chaudhuri, Olik

Metal working

Barrier layer or semiconductor device making

437 63, 437228, 350360, B44C 122, H01L 2968, G02B 2608

Patent

active

050182560

ABSTRACT:
DMD projection light values for HDTV have various manufacturing requirements, including the high yield integration of the DMD superstructure on top of an underlying CMOS address circuit. The CMOS chip surface contains several processing artifacts that can lead to reduced yield for the DMD superstructure. A modified DMD architecture and process are disclosed that minimizes the yield losses caused by these CMOS artifacts while also reducing parasitic coupling of the high voltage reset pulses to the underlying CMOS address circuitry.

REFERENCES:
patent: 4566935 (1986-01-01), Hornbeck
patent: 4615595 (1986-10-01), Hornbeck
patent: 4662746 (1987-05-01), Hornbeck
patent: 4710732 (1987-12-01), Hornbeck
patent: 4918032 (1990-04-01), Jain

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