Architecture and method for data reduction in a system for analy

Details Architecture and method for data reduction in a system for analy Architecture and method for data reduction in a system for analy

1993-09-20

1995-08-08

Lall, Parshotam S.

Boots, shoes, and leggings

364489, G06F 1750

Patent

active

054407206

ABSTRACT:
A method and apparatus to enable the size reduction of geometric databases used in the analysis of integrated circuit layouts. The results of design rule analysis on the groups of polygon shapes comprising the integrated circuit layout are stored as either in-group results or override results in a dedicated result register memory. In-group results are design rule analysis results which contain only shapes contained in the group being analyzed. Override results are additional shape models produced when the spatial relationship between the shapes in the group being analyzed and shapes in lower level groups invalidate the results previously obtained for those lower level groups. The data base structure is created using a general purpose computer consisting of a CPU connected to a plurality of memories along a common data bus.

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