Architectural equation generating algorithm

Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation

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703 26, G06F 1750

Patent

active

060773030

ABSTRACT:
An algorithm (20) or method (20) for verifying that a system hierarchically built from smaller components implements a desired equation that represents the system. Symbolic data is clocked (24) through the system by processing a symbolic test vector using linked equations (22) written (21) for each component of the system. A resulting symbolic equation generated at the output of the system is recorded (25). The symbolic equation is then compared (26) with the desired equation for the system using a symbolic manipulation tool. If the comparison generates a zero difference, the system correctly implements the desired equation representative of the system, and vice-versa.

REFERENCES:
patent: 5105373 (1992-04-01), Rumsey et al.
patent: 5404319 (1995-04-01), Smith et al.
patent: 5408638 (1995-04-01), Sagawa et al.
patent: 5410719 (1995-04-01), Shackleford

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