Arbitration of packet switched busses, including busses for shar

Details Arbitration of packet switched busses, including busses for shar Arbitration of packet switched busses, including busses for shar

1994-04-29

1995-08-08

Ray, Gopal C.

Multiplex communications

Wide area network

Packet switching

370 601, 370 852, 370 942, 370 856, 364228, 364229, 3642292, 364240, 3642401, 3642402, 3642426, 36424292, 364260, 3642601, 364DIG1, 34082551, 395296, G06F 1314, G06F 1336, G06F 1342, G06F 1316

Patent

active

054406986

ABSTRACT:
An arbiter is provided for resolving contention on synchronous packet switched busses, including busses composed of a plurality of pipelined segments, to ensure that all devices serviced by such a bus are given fair, bounded time access to the bus and to permit such devices to fill all available bus cycles with packets. Flow control for shared memory multiprocessors is readily implemented with this arbiter because the arbiter supports different types of arbitration requests and the prioritization of such arbitration requests by type.

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