Arbitration in multiprocessor communication node

Details Arbitration in multiprocessor communication node Arbitration in multiprocessor communication node

1988-11-14

1990-08-14

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

3408255, H04J 302

Patent

active

049493388

ABSTRACT:
An architecture for a switching node of a communication network includes a dedicated hardware Layer 1 processing portion and a Layer 2 and 3 processing portion based on multiple programmed general purpose processors. An array of such processors are used with an arbitration scheme for selecting which of the processors is to be used for any given Layer 2 or Layer 3 process. The architecture allows the node's capacity to be expanded by simply adding more processors to handle increased traffic.

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