Arbitrarily large clock networks with constant skew bound

Details Arbitrarily large clock networks with constant skew bound Arbitrarily large clock networks with constant skew bound

1991-02-22

1992-11-10

Safourek, Benedict V.

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3701001, H04L 704

Patent

active

051630680

ABSTRACT:
Global synchronization of an arbitrarily large computing structure, such that the clock skew between any two communicating cells is bounded by a constant, regardless of the size of the structure. The invention uses clock nodes to perform simple processing on clock signals. The clock signal is processed in a manner similar to that in which data signals are typically processed. A cyclic, or partially cyclic, network of the clock nodes, within certain topological constraints, along with timing constraints on the function of the clock nodes, maintains a constant bound on the skew.

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patent: 5051990 (1991-09-01), Kato
Seitz, "System Timing," ch. 7 in Mead et al. (eds.), Introduction to VLSI Systems (1980).
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Hoshino, "Pax Computer; High-Speed Parallel Processing and Scientific Computing," .sctn.8.3 (1985).
Fisher and Kung, "Synchronizing Large VLSI Processor Array," Proc. 10th Ann. Intl. Symp. Comp. Arch., pp. 54-58 (1983).
El-Amawy, "Properties of Branch-And-Combine Clock Networks," Tech. Report #09-91C-AE, Louisiana State University, Elect. & Compt. Engr. Dept. (1991).

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