Applying adaptive body bias to non-volatile storage

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185090, C365S185030, C365S185170, C365S201000

Reexamination Certificate

active

07468920

ABSTRACT:
Body bias can be applied to optimize performance in a non-volatile storage system. Body bias can be set in an adaptive manner to reduce an error count of an error correcting and/or detecting code when reading data from non-volatile storage elements. Also, a body bias level can be increased or decreased as a number of programming cycles increases. Also, body bias levels can be set and applied separately for a chip, plane, block and/or page. A body bias can be applied to a first set of NAND strings for which operations are being performed by controlling a first voltage provided to a source side of the first set of NAND strings and a second voltage provided to a p-well. A source side of a second set of NAND strings for which operations are not being performed is floated or receives a fixed voltage.

REFERENCES:
patent: 5386422 (1995-01-01), Endoh
patent: 5467306 (1995-11-01), Kaya
patent: 5522580 (1996-06-01), Varner, Jr.
patent: 5570315 (1996-10-01), Tanaka
patent: 5774397 (1998-06-01), Endoh
patent: 6046935 (2000-04-01), Takeuchi
patent: 6175522 (2001-01-01), Fang
patent: 6218895 (2001-04-01), De
patent: 6222762 (2001-04-01), Guterman
patent: 6272666 (2001-08-01), Borkar
patent: 6301155 (2001-10-01), Fujiwara
patent: 6363016 (2002-03-01), Lin
patent: 6366499 (2002-04-01), Wang
patent: 6456528 (2002-09-01), Chen
patent: 6484265 (2002-11-01), Borkar
patent: 6522580 (2003-02-01), Chen
patent: 6560152 (2003-05-01), Cernea
patent: 6577530 (2003-06-01), Muranaka
patent: 6734490 (2004-05-01), Esseni
patent: 6751125 (2004-06-01), Prinz
patent: 6771536 (2004-08-01), Li
patent: 6801454 (2004-10-01), Wang et al.
patent: 6839281 (2005-01-01), Chen
patent: 6859397 (2005-02-01), Lutze
patent: 6870213 (2005-03-01), Cai
patent: 6900650 (2005-05-01), Sheng
patent: 6917237 (2005-07-01), Tschanz
patent: 6957163 (2005-10-01), Ando
patent: 7009881 (2006-03-01), Noguchi
patent: 7046568 (2006-05-01), Cernea
patent: 7057958 (2006-06-01), So
patent: 7116588 (2006-10-01), Joo
patent: 7170785 (2007-01-01), Yeh
patent: 7196928 (2007-03-01), Chen
patent: 7292476 (2007-11-01), Goda
patent: 7345913 (2008-03-01), Isobe
patent: 7394708 (2008-07-01), Vadi
patent: 2002/0140496 (2002-10-01), Keshavarzi
patent: 2004/0057287 (2004-03-01), Cernea
patent: 2004/0109357 (2004-06-01), Cernea
patent: 2004/0255090 (2004-12-01), Guterman
patent: 2005/0024939 (2005-02-01), Chen
patent: 2005/0052219 (2005-03-01), Butler
patent: 2005/0111260 (2005-05-01), Nazarian
patent: 2005/0192773 (2005-09-01), Sheng
patent: 2006/0126390 (2006-06-01), Gorobets
patent: 2006/0133172 (2006-06-01), Schnabel
patent: 2006/0140007 (2006-06-01), Cernea
patent: 2006/0158947 (2006-07-01), Chan
patent: 2006/0226889 (2006-10-01), Gupta
patent: 2006/0227613 (2006-10-01), Joo
patent: 2007/0008779 (2007-01-01), Isobe
N. Shibata et al., A 70nm 16Gb 16-level-cell NAND Flash Memory, 2007 Symp. on VLSI Circuits Digest of Technical Papers, pp. 190-191, Jun. 14-16, 2007.
Y. Zhang et al., An Integrated Phase Change Memory Cell With Ge Nanowire Diode For Cross-Point Memory, 2007 Symp. on VLSI Circuits Digest of Technical Papers, pp. 98-99, Jun. 14-16, 2007.
D.H. Kang et al., Novel Heat Dissipating Cell Scheme For Improving A Reset Distribution In A 512M Phase-Change Random Access Memory (PRAM), 2007 Symp. on VLSI Circuits Digest of Technical Papers, pp. 96-97, Jun. 14-16, 2007.
H. Tanaka et al., Bit Cost Scalable Technology With Punch And Plug Process For Ultra High Density Flash Memory, 2007 Symp. on VLSI Circuits Digest of Technical Papers, pp. 14-15, Jun. 14-16, 2007.
U.S. Appl. No. 11/618,793, filed Dec. 30, 2006.
Office Action dated Jul. 22, 2008, U.S. Appl. No. 11/618,782, filed Dec. 30, 2006.
Office Action dated Jun. 24, 2008, U.S. Appl. No. 11/618,786, filed Dec. 30, 2006.
Office Action dated Jun. 9, 2008, U.S. Appl. No. 11/618,788, filed Dec. 30, 2006.
Office Action dated Jun. 9, 2008, U.S. Appl. No. 11/618,790, filed Dec. 30, 2006.
Office Action dated Jul. 23, 2008, U.S. Appl. No. 11/618,793, filed Dec. 30, 2006.

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