Application of state silos for recovery from memory management e

Boots – shoes – and leggings

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364DIG1, 3642318, 3642599, 3642852, 3642665, G06F 938, G06F 1100

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active

051194830

ABSTRACT:
To reduce the processing time required for correcting a fault, the instruction decorder segment and the first execution segment of a pipelined processor are provided with "state silos" that are operative during normal instruction execution to save a sufficient amount of state information to immediately restart the instruction decoder segment and the first execution segment by reloading the state information having been stored in the state silos. The state silos, for example, include a queue of registers clocked by a common clocking signal that is inhibited during correction of the fault. When the fault is corrected, multiplexers select the state information from the silos to be used by the respective pipeline segments. In a preferred embodiment, the instruction decoder segment decodes variable length macroinstructions into operand specifiers and operations to perform upon the specifiers. The first execution segment receives control information when a new operand specifier or operation is decoded, and otherwise holds the previously received control information. A microsequencer issues a series of microinstructions for each specifier or operation having been decoded, and also issues a series of microinstructions in a fault routine when a fault occurs. The microsequencer is also provided with a state silo so that the normal sequence of microinstruction execution is resumed when the fault is corrected.

REFERENCES:
patent: 4075688 (1978-02-01), Lynch, Jr. et al.
patent: 4236206 (1980-11-01), Strecker et al.
patent: 4488228 (1984-12-01), Crudele et al.
patent: 4493035 (1985-01-01), MacGregor et al.
patent: 4521851 (1985-06-01), Trubisky et al.
patent: 4524415 (1985-06-01), Mills, Jr. et al.
patent: 4559596 (1985-12-01), Ohnishi
patent: 4586130 (1986-04-01), Butts, Jr. et al.
patent: 4703481 (1987-10-01), Fremont
patent: 4855904 (1989-08-01), Daberkow
Sudhindra N. Mishra, "The VAX 8800 Microarchitecture", Digital Technical Journal, No. 4, Feb. 1987, pp. 20-33.
Troiani et al., "The VAX 8600 IBOX, A Pipelined Implementation of the VAX Architecture", Digital Technical Journal, No. 1, Aug. 1985, pp. 24-42.
Levy & Eckhouse, Jr., Computer Programming and Architecture--The VAX-11, Digital Equipment Corporation, 1980, pp. 358-360.

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