Apparatus with multiple buses for permitting concurrent access t

Details Apparatus with multiple buses for permitting concurrent access t Apparatus with multiple buses for permitting concurrent access t

1992-01-15

1994-01-04

Lee, Thomas C.

Boots, shoes, and leggings

395275, 364DIG1, 3642402, 3642423, 364 2492, G06F 1340

Patent

active

052768457

ABSTRACT:
Communication-control equipment having data-processor, primary storage for storing process data of the data-processor, secondary storage for storing DMA data as well as the process data, and DMA bus for transferring only the DMA data communicated between the secondary storage and a transmission or receiving buffer. The data-processor can communicate with the primary storage during DMA data transfer, because the DMA data are transferred through the DMA bus and so the address bus and data bus connecting data-processor and the primary storage are available during the DMA transfer.

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The Zilog Product Specification, "Z8530 SCC Serial Communication Controller", Feb., 1981, pp. 259-268.
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Osborne, A., An Introduction to Microcomputers; vol. 1 1980 pp. 5-88-5-93.

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