Apparatus to passivate inductively or capacitively coupled...

Details Apparatus to passivate inductively or capacitively coupled... Apparatus to passivate inductively or capacitively coupled...

2008-07-08

2008-07-08

Le, Dung A. (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Including dielectric isolation means

C257S510000, C257S521000, C257SE21546

Reexamination Certificate

active

07397105

ABSTRACT:
A deep n-well is formed beneath the area of a capacitor structure. The use of a deep n-well lessens the parasitic capacitance by placing a diode in series with the interlayer dielectric cap. The deep n-well also reduces substrate noise. Once the n-well is implanted and annealed, a cross hatch of shallow trench isolation is patterned over the n-well. The shallow trench isolation reduces and confines the inductively and/or capacitively coupled surface currents to small areas that are then isolated from the rest of the chip.

REFERENCES:
patent: 6306720 (2001-10-01), Ding
patent: 2004/0195650 (2004-10-01), Yang et al.
patent: 2005/0023639 (2005-02-01), Yeh et al.

Affiliated with

Also associated with

Rating

Apparatus to passivate inductively or capacitively coupled... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Apparatus to passivate inductively or capacitively coupled..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus to passivate inductively or capacitively coupled... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2794535