Apparatus, systems and methods for isolating faults during data

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371 205, 371 221, G06F 1100

Patent

active

055419348

ABSTRACT:
Circuitry 300 is disclosed for isolating faults in a path 304 transmitting data words each having at least one data bit and at least one parity bit. Circuitry 300 includes a plurality of exclusive-OR gates 303 each having a first input coupled to the data path 304 for receiving a bit of a one of the data words being transmitted along path 304. A plurality of multiplexers 305 are also provided, each multiplexer 305 including a first input coupled to an output of a corresponding one of the exclusive-OR gates 303 and a control signal input for receiving a control signal. A plurality of registers 306 have an input coupled to an output of a corresponding one of the multiplexers 305 and an output coupled to a second input of a corresponding one of the exclusive-OR gates 303 and a second input of the corresponding one of the multiplexers 305. Each multiplexer 305 is operable to pass a bit presented at the output of the corresponding exclusive-OR gate 305 to the corresponding register 306 in response to a first state of the control signal and pass a bit presented at the output of the corresponding register 306 to the input of the corresponding register 306 in response to a second state of the control signal.

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