Apparatus, systems and methods for improving data cache hit rate

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Details

39542103, 39542105, 39542104, 395800, 395464, 395566, G06F 1300

Patent

active

056491441

ABSTRACT:
A processing system is provided which generates a memory address and presents the memory address to a cache to retrieve corresponding data when such corresponding data is encached therein. The memory address is presented to a main memory to retrieve the corresponding data therefrom when such corresponding data is not encached in cache. An offset address to the memory address is used to obtain a prefetch address which in turn is presented to the main memory to retrieve selected information stored within memory. The cache then stores the selected information retrieved from the main memory.

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