Static information storage and retrieval – Addressing – Plural blocks or banks
Patent
1993-05-28
1996-06-18
Fears, Terrell W.
Static information storage and retrieval
Addressing
Plural blocks or banks
36523001, 36523005, G11C 1300
Patent
active
055285490
ABSTRACT:
An active memory 14 is provided which includes a data memory 20 including rows and columns of storage locations for holding data and computational results. A broadcast memory 22 includes rows and columns of storage locations for holding control instructions. Computing circuitry 26 is provided which is operable to perform a first computational operation using first and second words of data retrieved from the data memory 20 and perform a second computational operation using a result from the first operation and a result from a previous operation. Control circuitry 24 is operable in response to control instructions received from broadcast memory 22 to control the transfer of the first and second words of data from the data memory 20 to said computing circuitry 26 and the performance of the first and second operations.
REFERENCES:
patent: 4903236 (1990-02-01), Nakayama et al.
patent: 5276643 (1994-01-01), Hoffmann et al.
Future Generation Computer Systems, vol. 6, 1990, T. Martinez "Smart Memory Architecture and Methods", pp. 145-162.
Sensor Fusion II, Mar. 28, 1989, Orlando, USA, S. Morton "Intelligent Memory Chips" pp. 136-150.
ICASSP 90, vol. 2, Apr. 3, 1990, Albuquerque, USA, B. Pawate, et al. "Memory Based Digital Signal Processing" pp. 941-944.
Doddington George R.
Mahant-Shetti Shivaling
Pawate Basavaraj
Smith Derek
Brady III W. James
Donaldson Richard L.
Fears Terrell W.
Texas Instruments Incorporated
Valetti Mark A.
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